Half Subtractor in Digital Electronics

In this lecture, we will learn about the Half Subtractor, its circuit diagram, the truth table of the half Subtractor, and the K-map of the half adder in a very detailed analysis.

Subtracting the two binary digits is the most basic operation performed by digital computers. For this subtraction, there are binary adders used.

There are two types of binary Subtractors:

  1. Half Subtractor and
  2. Full Subtractor

In this section, we will learn digital circuits which are used to subtract two binary numbers called Half subtractors. We will learn the full subtractor in the next lecture.

Note: Before getting the knowledge of the subtractors, you can also learn the digital circuits that add the two binary numbers.

There are two types of binary adders:

  1. Half adders and
  2. Full adders

What is Half Subtractor

Half subtractor is a combinational circuit with two inputs and two outputs ( difference and borrow). It produces the difference between the two binary bits at the input and also produces an output (borrow) to indicate if a 1 has been borrowed. If the subtraction (A – B), then A is called the minuend bit and B is called as subtrahend bit.

Block diagram of Half Subtractor

The basic block diagram of the Half subtractor is shown in the below figure.

Block diagram of Half Subtractor

The half-subtractor circuit is designed to subtract two single-bit binary numbers A and B.

Half Subtractor Truth Table

Half Subtractor Truth Table showing the outputs of a half subtractor for all the possible combinations of inputs are shown in the below table.

ABDifference D (A – B)Borrow B

Half Subtractor K Map

The K Maps for the difference and borrow outputs of a half subtractor are shown in the figure below:

Half Subtractor K Map

We can use the K-Map (or Karnaugh Map), a method for simplifying Boolean algebra, to determine equations of the difference bit (D) and the output borrow (B).

Half Subtractor Expression

The boolean expression for the difference output of half subtractor can be given by,

Difference, \mathbf{D = \bar A B + A \bar B}
\mathbf{\therefore D = A \oplus B}

And the expression for Borrow Ouput of half subtractor can be given by,

Borrow, \mathbf{B = \bar A B}

Half Subtractor Circuit Diagram

The Half Subtractor Circuit Diagram is shown in the below figure.

Half Subtractor Circuit Diagram

Half Subtractor using NAND Gates

We may implement the logic circuit of half subtractor using NAND gates only as shown in the figure below:

Half Subtractor using NAND Gates

From this logic circuit diagram, we can see that 5 NAND Gates are required for the realization of the half subtractor.

The output equations of the half subtractor in NAND logic are as follows −

Difference Bit (D)

\mathbf{Difference,\, D=\overline{\overline{A\cdot \overline{AB}}\cdot \overline{B\cdot \overline{AB}}}=A\oplus B}

Borrow Bit (B)

\mathbf{Borrow,\, B=\overline{\overline{B\cdot \overline{AB}}}=\overline{A}B}

In this way, we can realize the half subtractor using the NAND gates only.

Disadvantages of Half Subtractor

As we have seen from the above analysis that the Half Subtractor can only perform the subtraction of two binary bits. But while performing the subtraction, it does not take into account the borrow of the lower significant stage.

Applications of Half Subtractor

Here are a few significant uses for half subtractors:

  • The ALU (Arithmetic Logic Unit) of processors uses a half subtractor.
  • To correct for audio distortion, amplifiers can also utilize a half subtractor.
  • Additionally, it is employed to lessen the strength of audio and radio transmissions.
  • To increase or reduce operators, use the half subtractor.

FAQs on Half Subtractor

What is the half subtractor?

The half subtractor is a combinational circuit that is used to perform the subtraction of two bits

What are the objectives of a half subtractor?

The half subtractor is also a building block for subtracting two binary numbers. 

What is the formula for half subtractor using NAND gate?

The final difference D output equation is D = A⊕B and Barrow B equation is B=A’B.

Where is the half subtractor used?

Half subtractors are used in applications such as arithmetic circuits, data processing, and computer memory.

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Hello friends, my name is Trupal Bhavsar, I am the Writer and Founder of this blog. I am Electronics Engineer(2014 pass out), Currently working as Junior Telecom Officer(B.S.N.L.) also I do Project Development, PCB designing and Teaching of Electronics Subjects.

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