In this lecture, we will learn about the Full adder in digital electronics, its circuit diagram, the truth table of the Full adder, and the K-map of the Full adder in a very detailed analysis.
Adding two binary digits is the most basic operation performed by digital computers. For this addition, there are binary adders used.
There are two types of binary adders:
In this section, we are going to learn digital circuits which are used to add two binary numbers without any drawbacks called Full adders.
What is Full Adder
To overcome the disadvantages of half adder circuits, a 3 single-bit adder circuit has been developed called a Full adder.
A full-adder is a combinational logic circuit that can add two binary digits (bits) and a carry bit and outputs a sum bit and a carry bit.
A complete adder is a combinational circuit that is meant to add three binary bits and provides two outputs (sum and carry). Thus, a full adder circuit adds three binary digits, two of which are inputs and one of which is the carry from the previous addition.
It can add two 1-bit numbers A and B, and carry Cin. The full adder is a three-input and two-output combinational circuit.
Full Adder Block diagram
The basic block diagram of the Full adder is shown in the below figure:
The Full adder circuit is designed to add three single-bit binary numbers A, B, and Cin.
Full Adder Truth Table
A truth table is one that shows the relationship between input and output variables in a logic circuit and illustrates how the logic circuit works. The full-adder circuit’s truth table is shown below:
| Inputs | Outputs | |||
|---|---|---|---|---|
| A | B | Cin | S (Sum) | Cout (Carry) |
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Hence, from the truth table, it is clear that the sum output of the full adder is equal to 1 when only 1 input is equal to 1 or when all the inputs are equal to 1. At the same time, the carry output has a carry of 1 if two or three inputs are equal to 1.
K-Map for Full Adder
K-map for the sum (S) and Carry out (Co) outputs are shown in the figure below.
Full Adder boolean expression
The sum (S) of the full adder is the XOR of A, B, and Cin. Therefore,
S = \bar A\bar B C_{in} + \bar A B \bar {C_{in}} + ABC_{in} + A \bar B \bar C_{in}
S = C_{in}(\bar A \bar B + AB) + \bar C_{in}(\bar A B + A \bar B)
\therefore S = C_{in}\overline{(\bar A B + A \bar B)} + \bar C_{in}(\bar A B + A \bar B)
Let X = \bar A B + A \bar B
\therefore S = C_{in} \bar X + \bar C_{in} X = C_{in} \oplus X
\therefore S = C_{in} \oplus (\bar AB + A \bar B)
\therefore S = C_{in} \oplus A \oplus B
The carry output(C) of the half-adder is the AND of A and B. Therefore,
Carry, C0 = AB + ACin + BCin
Full adder circuit diagram
The full adder circuit diagram is shown in the figure below:
Full adder using Half adder
The full adder circuit can be constructed using the two half adders and one OR gate. The block diagram of a full adder using a half adder is shown in the below figure:
A detailed circuit diagram of the full adder using the half adder is shown in the figure below:
Advantages of Full Adder
The following are the key advantages of a complete adder over a half adder:
- The full adder allows you to add the carry from the previous stage.
- The power consumed by the full adder is less than that of the half adder.
- A full adder can simply be transformed into a half subtractor by incorporating a NOT gate into the circuit.
- The output of a full adder is greater than that of a half adder.
- Full adders are crucial components of critical digital circuits such as multiplexers.
- Full adders operate at a faster rate.
Applications of Full Adder
The following are some of the most important applications of full adder:
- Full adders are found in the ALUs (arithmetic logic units) of computer CPUs.
- Calculators employ full adders.
- Full adders also aid in the multiplication of binary numbers.
- Full adders are also utilized to construct critical digital circuits such as multiplexers.
- Memory addresses are generated using full adders.
- Full adders can also be employed to generate program counterpoints.
- GPUs (Graphical Processing Units) also use full adders.
Also read
- Classification of Logic Families |Characteristics of Logic Families
- List Of Best Books For Digital Electronics For GATE, ESE PSUs
| AND Gate | Click Here |
| OR Gate | Click Here |
| NOT Gate | Click Here |
| NOR Gate | Click Here |
| XOR Gate | Click Here |
| XNOR Gate | Click Here |
| NAND Gate | Click Here |
