Classification of Logic Families |Characteristics of Logic Families


Various digital ICs available in the market belong to various types. These types are known as Logic Families.

Based on the components and devices internally used, digital logic families are named as

  • RTL(Resistor Transistor Logic)
  • TTL(Transistor Transistor Logic)
  • DTL(Diode Transistor Logic)
  • CMOS etc.

Classification of Logic Families:

The two basic techniques for manufacturing ICs are:

  1. Bipolar Technology
  2. Metal oxide semiconductor (MOS) technology.

Bipolar Families:

  • The bipolar families of logic circuits construct, especially from components fabricate bipolar transistors on the chip.
  • In the bipolar category, there are three basic families called Diode transistor logic(DTL), Transistor Transistor Logic(TTL), and Emitter Coupled Logic (ECL).
  • DTL uses diodes and transistors, TTL uses transistors almost exclusively, TTL has become the most popular family in SSI (Small scale integration) and MSI(medium-scale integration) chips, while ECL is the fastest logic family which is used for high-speed applications.

MOS Families:

  • The MOS family fabricates the MOS field effect transistors (MOSFETs).
  • In the MOS category, there are three logic families namely PMOS(p-channel MOSFETs) family, NMOS(n-channel MOSFET) family, and CMOS(Complementary MOSFET) family.
  • PMOS is the oldest and slowest type. NMOS is used for LSI(large-scale integration) field for microprocessors and memories.
  • CMOS which uses a push-pull arrangement of n-channel and p-channel MOSFETs is extensively used where low power consumption is needed such as in pocket calculators.

In the “Bipolar saturated” logic families, the bipolar transistors are used as the main device. It is used at the switch and operated in the saturation and cutoff regions.

TTL is an example of saturated bipolar logic.

In the unsaturated bipolar logic, the bipolar transistor is not driven into hard saturation. This increases the speed of operation.

So, the unsaturated bipolar ICs such as Schottky TTL and ECL are much faster as compared to TTL.

All these ICs are fabricated on silicon chips using different fabrication technologies.

Study Also: Logic Gates and Truth Table

Characteristics (Parameters) of Logic Families:

Even though there are various logic families, the general characteristics, definitions, nomenclature, and terminologies used for all of them have been standardized.

So let us discuss some of the most important general characteristics first.

1. Voltage and Current Parameters: 

Voltage Parameters (Threshold Levels):

Ideally, the input voltage levels of 0V and +5V (for TTL) are called logic 0 and 1 levels respectively.

However, practically we will not always obtain voltage levels matching exactly to these values. Therefore it is necessary to define the worst-case input voltages.

VIL(max) – worst-case low-level input voltage:

  • This is the maximum value of input voltage which will be considered as a logic 0 level. If the input voltage is higher than VIL(max), then it will not be treated as a low (0) input level.

VIH(min) – worst-case high-level input voltage:

  • This is the minimum value of input voltage which will be considered as a logic 1 level. If the input voltage is lower than VIH(min), then it will not be treated as a high (1) input level.

VOH(min) – worst-case high-level output voltage:

  • This is the minimum value of output voltage which will be considered as a logic 1 level. If the output voltage is lower than VOH(min), then it will not be treated as a high (1) output level.

VOL(max) – worst-case low-level output voltage:

  • This is the maximum value of output voltage which will be considered as a logic 0 level. If the input voltage is higher than VOL(max), then it will not be treated as a low (0) output level.

The voltage parameter can be shown on the digital circuit consisting of gates as shown in the below figure. Note that the NAND and NOT gates are shown can be of TTL, ECL, CMOS or any other type.


Current Parameters :

IIL – Low-level input Current:

  • It is the current that flows into the input when a low-level input voltage in the specified range is applied.

IIH – High-level input Current:

  • It is the current that flows into the input when a high-level input voltage in the specified range is applied.

IOL – Low-level output Current:

  • It is the current that flows from the output when the output voltage is in the specified low voltage range and the specified load is applied.

IOH – High-level Output Current:

  • It is the current that flows from the output when the output voltage is in the specified high voltage range and the specified load is applied.

If the output current flows into the output terminal then it is called a sinking current and if the output current flows away from the output terminal then it is called a sourcing current.

The current parameters are displayed on the logic circuit shown in the figure below:


Note that the actual current directions can be opposite to those shown in the figure; depending on the family.

In most data books, the current flowing into nodes or devices is considered positive, and the current flowing out from the node or device is considered as negative.

2. Fan-in and Fan-out:

Fan-in :  

  • The fan in is defined as the number of inputs a gate has. For example, a two-input gate will have a fan-in is equal to 2.


  • Fan-out is defined as the maximum number of inputs of the same IC family that a gate can drive without falling outside the specified output voltage limits.
  • Higher the fan-out, the higher the current supplying capacity of a gate. For example, a fan-out of 5 indicates that the gate can drive (supply current to) at the most 5 inputs of the same IC family.
  • The concept of fan-out will be more clear if you refer to the figure given below:
  • As shown in the figure, the fan-out of the driver gate which is driving the N number of the gate is N.
  • Fan-out is also called the loading factor. If the specified fan out of a gate is 10 then we should not load it with more than 10 gates. Because then the output logic level voltages can not be guaranteed.
  • Fan out depends on the nature of the input devices that are connected to an output.
  • Unless a different logic family is specified as the load device, fan-out is assumed to be referred to load device of the same family as the driving device.
Study Also: Syllabus of Digital Electronics

3. Noise Margin :

To understand the meaning of the term “Noise Margin” or “Noise Immunity“, refer to the input and output voltage profiles shown in the figure.

Noise is unwanted electrical disturbances that may induce some voltage in the connecting wires used between two gates or from a gate output to load.

Noise immunity is defined as the ability of a logic circuit to tolerate the noise without causing any unwanted changes in the output.

A quantitative measure of noise immunity is called noise margin.  


In order to avoid the effect of noise voltage, the voltage levels VOH(min) and VIH(min) are adjusted to different levels with some difference between them as shown in the above figure.

The difference between VOH(min) and VIH(min) is known as high-level noise margin VNH.

similarly, the difference between VIL(max) and VOL(max) is called the low-level noise margin VNL.

High-Level Noise Margin, VNH = VOH(min) – VIH(min)

Low Level Noise Margin, VNL = VIL(max) – VOL(max)

When a high logic output is driving a logic circuit input, any negative noise spike greater than VNH can cause the voltage to drop into the invalid range.

Similarly, when a low logic output s driving a logic circuit input, any positive spikes greater than VNL can cause the voltage to go into the invalid range. 

4. Propagation Delay(Speed of operation) :

The output of logic does not change its state instantaneously in response to the change in the state of the input.

There is a time delay between those two events, which is called propagation delay.

Thus propagation delay is defined as the time delay between the instant of application of an input pulse and the instant of occurrence of the corresponding output pulse.  This is shown in the figure.


From the above figure, it is observed that there are two propagation delays.

1. tPHL: The propagation delay is measured when the output makes a transition from a HIGH (1) to a LOW (0) state.

2. tPLH: The propagation delay is measured when the output makes a transition from a LOW (0) to a HIGH (1) state. 

There are some important points that you have to remember :

  1. The values of tPHL and tPLH are not always the same. If they are not equal then the one which is higher is considered as the propagation delay time of the gate.
  2. The propagation delays are measured between the points corresponding to  50% levels as shown in the figure. 

Ideally, the propagation delay should be zero and practically it should be as short as possible.

The values of propagation delays are used as a measure of the relative speed of logic circuits.

For example, a logic circuit with a propagation delay time of 5ns will be faster than the one with a 10ns propagation delay time. 

5. Power Dissipation :

As a result of applied voltage and currents flowing through the logic families (ICs), some power will be dissipated in it in the form of heat.

The power is in milliwatts. 

Care should be taken to reduce the power dissipation taking place in the logic ICs in order to protect the ICS against damage due to excessive heat, to reduce the loading on power supplies, etc.

Another importance of power dissipation is that the product of power dissipation and propagation time is always constant.

Therefore reduced power dissipation may lead to an increase in propagation delay.

Usually, there is only one power supply terminal on any ICs. It is denoted by VCC for the TTL ICs and VDD for the CMOS ICs.

The power drawn by an IC from the power supply is given by,


  • Where ICC is the current drawn from the power supply.

For many ICs the current drawn from the power supply will be dependent on the logic states of the circuit on the chip.

In the below figure (a), a NAND gate IC with all its outputs is high. the current drawn from the source under such conditions is denoted by ICCH.

The below figure (b), shows another extreme condition where the outputs al all the NAND gates are “0”. The current drawn from the source under such conditions is denoted by ICCL.


The values of ICCH and ICCL are measured with open-circuited outputs because the load will change these values.

ICCH and ICCL are different values, so an average value of them is generally considered to calculate average power dissipation.

ICC(avg) =  (ICCH  +  ICCL / 2)

PD(avg) = VCC X ICC(avg)

6.Operating Temperature:

The temperature range acceptable for consumer and industrial applications is 0o and 70o  C and that for military applications is -55o to 125o C.

The performance of gates will be within the specified limits over these temperature ranges.

7. Figure of Merit (Speed Power Product SPP) : 

The figure of merit of a logical family is the product of power dissipation and propagation delay.

It is called the speed-power product. The speed is specified in seconds and power is specified in watts.

Figure if Merit = Propagation delay time x Power dissipation 

Practically, the value of the figure of merit should be as low as possible.

The figure of merit is always a compromise between speed and power dissipation. That means if we try to reduce the propagation delay then the power dissipation will increase and vice-versa.

The speed-power product is used as a common means for measuring and comparing the overall performance of different IC families.

Suppose that an IC family has an average propagation delay of 20ns and an average power dissipation of 5mW, then its SPP is given by,

SPP=20ns x 5 mW = 100 X 10-12 Watt-second

                  = 100 picojoules

8. Invalid Voltage Levels :

The operation of a logic circuit will be proper if and only if its input voltage levels are kept outside the invalid voltage range.

That means the input voltage should be either lower than VIL(max) or higher than VIH(min).

The invalid input voltage will produce an unpredictable output response. Therefore it should be avoided.

When the output is overloaded, there is a possibility of output voltage going into an invalid range.

Frequently Asked Questions on Logic Families

Explain the classification of saturated bipolar logic families.

Resistor Transistor Logic (RTL), Diode Transistor Logic (DTL), Direct Coupled Transistor Logic (DCTL), Integration Injection Logic, High Threshold Logic (HTL), Transistor Transistor Logic (TTL)

why CMOS logic families is most preferred in large-scale integrated circuits?

Because of high noise immunity and low static power dissipation, now CMOS logic families are most preferred in large-scale integrated circuits.

which of the logic families is specifically adapted for low-power applications?

CMOS Logic Families


So in this lecture, we have learned the classification of Logic families and then we learned the Important parameters of Logic families.

Hope you like this topic. If you have any queries regarding this topic then you can comment below the comment box. I will surely reply to your query.

You can also buy the book to read more about this subject. you can see the below link to see which book you have to buy.

 List of Important books to know more about Digital Electronics

You can also contact me to know more about me or any subject you like to ask about, Just go to the Contact-us page and fill out the form.

Previous articleLogic Gates and Truth Table for GATE,ESE-2022
Next articleIntroduction to Combinational Circuits for GATE 2022
Electronics Engineering(2014 pass out) Junior Telecom Officer(B.S.N.L.) Project Development, PCB designing Teaching of Electronics Subjects


  1. This is really interesting, You’re a very skilled blogger.
    I’ve joined your feed and look forward to seeking more of your magnificent post.
    Also, I have shared your web site in my social networks!


Please enter your comment!
Please enter your name here

This site uses Akismet to reduce spam. Learn how your comment data is processed.